A semiconductor device 100 including an internal circuit 4 that operates based on an input pattern includes a clock driver 25 that generates an internal clock 7 based on a generated clock 6, a counter 23 that generates count data 28 by counting the generated clock 6, a nonvolatile storage device 22 that stores storage data 27 used in an IDDQ test, a comparator 24 that stops the generation of the internal clock 7 by the clock driver 25 when the count data 28 and the storage data 27 match each other, and a pseudo random number generation circuit 3 that supplies a pseudo random number 8 to the internal circuit 4 in synchronization with the internal clock 7.