A method for performance monitoring in a computing system is described. In some embodiments, an addressable memory stores data and instructions for performing context switch sampling. A processor includes hardware event counters, and is coupled with the addressable memory to access said instructions and in response to said instructions, the processor counts occurrences of a first hardware event in a first hardware event counter and counts occurrences of a second hardware event in a second hardware event counter. After a specified number of occurrences of the first hardware event have been counted, the second hardware event counter is sampled and hardware event counters are reset. In some embodiments the processor counts occurrences of segment register load events in the first hardware event counter and then records the sampled second hardware event counter value with a process identifier value and/or a thread identifier value.