Invention Grant
- Patent Title: Minimizing interconnections in a multi-shelf switching system
- Patent Title (中): 最大限度地减少多层交换系统中的互连
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Application No.: US12683504Application Date: 2010-01-07
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Publication No.: US08347006B2Publication Date: 2013-01-01
- Inventor: Qiong Zhang , Paparao Palacharla , Xi Wang , Takao Naito
- Applicant: Qiong Zhang , Paparao Palacharla , Xi Wang , Takao Naito
- Applicant Address: JP Kawasaki-Shi
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki-Shi
- Agency: Baker Botts LLP
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F17/50 ; G06G7/62

Abstract:
In certain embodiments, minimizing interconnections in a multi-shelf switching system includes receiving a map describing the switching system, where the switching system comprises shelves and input/output (I/O) points. The map is transformed to yield a graph comprising nodes and edges. A node represents an I/O point, and a node weight represents a number of interface cards of the I/O point represented by the node. An edge between a node pair represents traffic demand between the I/O points represented by the node pair, and an edge weight represents the amount of the traffic demand represented by the edge. The graph is partitioned to yield a groups that minimize interconnection traffic among the shelves, where each group represents a shelf of the multi-shelf switching system.
Public/Granted literature
- US20110167183A1 Minimizing Interconnections In A Multi-Shelf Switching System Public/Granted day:2011-07-07
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