Invention Grant
- Patent Title: Memory system monitoring data erasing time or writing time
- Patent Title (中): 内存系统监控数据擦除时间或写入时间
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Application No.: US12752525Application Date: 2010-04-01
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Publication No.: US08347024B2Publication Date: 2013-01-01
- Inventor: Takeaki Sato
- Applicant: Takeaki Sato
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-220164 20090925
- Main IPC: G06F13/00
- IPC: G06F13/00

Abstract:
A memory system includes a non-volatile semiconductor memory that includes a plurality of blocks, each of the blocks being a data erasing unit; an erasing time monitoring unit that monitors time required for erasing data from the non-volatile semiconductor memory; a management table for managing the erasing time on a unit of each of the blocks; and a wear-leveling control unit that levels number of rewriting across the blocks based on the management table. The memory system accommodates variations among lots, individual pieces, and blocks, thereby performing highly-accurate wear leveling.
Public/Granted literature
- US20110078402A1 MEMORY SYSTEM Public/Granted day:2011-03-31
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