A debugging support device includes: a plurality of CPU simulating units which simulates the operations of a plurality of CPUs which executes programs in parallel; a memory simulating unit of a memory to be shared by the plurality of CPUs; an event monitoring unit that detects a predetermined event occurring between each CPU simulating unit and the memory simulating unit; and a state judging unit that judges whether the state of the occurred predetermined event matches a predetermined condition and, if the predetermined condition is matched, records history information related to the state of the memory simulating unit.