Invention Grant
- Patent Title: Tape wiring substrates and packages including the same
- Patent Title (中): 胶带接线基板和包装件
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Application No.: US12507551Application Date: 2009-07-22
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Publication No.: US08350158B2Publication Date: 2013-01-08
- Inventor: Yechung Chung , Chulwoo Kim , Eunseok Song , Kyoungsei Choi
- Applicant: Yechung Chung , Chulwoo Kim , Eunseok Song , Kyoungsei Choi
- Applicant Address: KR Gyeonggi-Do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2008-0080559 20080818
- Main IPC: H05K1/00
- IPC: H05K1/00

Abstract:
Example embodiments are directed to a tape wiring substrate including a film having an upper surface including a chip mounting area, the chip mounting area further including an inner area and a peripheral area, the film further including a lower surface, and vias penetrating the film, the vias being located in the inner area, an upper metal layer on the upper surface of the film and connected to electrode bumps of a semiconductor chip, and a lower metal layer on the lower surface of the film. Example embodiments are directed to a tape wiring substrate including a film having an upper surface including a chip mounting area, a lower surface, and vias penetrating the film, an upper metal layer on the upper surface of the film and connected to electrode bumps of a semiconductor chip, and a lower metal layer on the lower surface of the film, the vias being located outside of the chip mounting area. Example embodiments are directed to packages including tape wiring substrates.
Public/Granted literature
- US20100038117A1 TAPE WIRING SUBSTRATES AND PACKAGES INCLUDING THE SAME Public/Granted day:2010-02-18
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