Invention Grant
- Patent Title: Integrated circuits based on aligned nanotubes
- Patent Title (中): 基于排列纳米管的集成电路
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Application No.: US12625543Application Date: 2009-11-24
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Publication No.: US08354291B2Publication Date: 2013-01-15
- Inventor: Chongwu Zhou , Koungmin Ryu , Alexander Badmaev , Chuan Wang
- Applicant: Chongwu Zhou , Koungmin Ryu , Alexander Badmaev , Chuan Wang
- Applicant Address: US CA Los Angeles
- Assignee: University of Southern California
- Current Assignee: University of Southern California
- Current Assignee Address: US CA Los Angeles
- Agency: Fish & Richardson P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.
Public/Granted literature
- US20100133511A1 Integrated Circuits Based on Aligned Nanotubes Public/Granted day:2010-06-03
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