Invention Grant
- Patent Title: Semiconductor memory device and method of fabrication of the same
- Patent Title (中): 半导体存储器件及其制造方法
-
Application No.: US12983633Application Date: 2011-01-03
-
Publication No.: US08354318B2Publication Date: 2013-01-15
- Inventor: Toshiharu Watanabe
- Applicant: Toshiharu Watanabe
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-050118 20070228
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A semiconductor memory device includes a first memory cell transistor. The first memory cell transistor includes a tunnel insulation film provided on a semiconductor substrate, a floating electrode provided on the tunnel insulation film, an inter-gate insulation film provided on the floating electrode, and a control electrode provided on the inter-gate insulation film. The floating electrode includes a first floating electrode provided on the tunnel insulation film and a second floating electrode provided on one end portion of the first floating electrode, the floating electrode having an L-shaped cross section in a wiring direction of the control electrode.
Public/Granted literature
- US20110097862A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATION OF THE SAME Public/Granted day:2011-04-28
Information query
IPC分类:
