Invention Grant
- Patent Title: Integrated circuit with adaptive VGG setting
- Patent Title (中): 具有自适应VGG设置的集成电路
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Application No.: US12781627Application Date: 2010-05-17
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Publication No.: US08354671B1Publication Date: 2013-01-15
- Inventor: Hsung Jai Im , Henley Liu , Jae-Gyung Ahn , Tony Le , Patrick J. Crotty
- Applicant: Hsung Jai Im , Henley Liu , Jae-Gyung Ahn , Tony Le , Patrick J. Crotty
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Scott Hewett; Gerald Chan; Thomas George
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L29/10 ; H01L21/66 ; G01R31/26 ; G01N27/00

Abstract:
A technique for setting Vgg in an IC is disclosed. The technique includes specifying a design reliability lifetime for the IC, and a relationship between maximum gate bias and gate dielectric thickness for the IC sufficient to achieve the design reliability lifetime is established. The IC is fabricated and the gate dielectric thickness is measured. A maximum gate bias voltage is determined according to the gate dielectric thickness and the relationship between maximum gate bias and gate dielectric thickness, and a Vgg trim circuit of the IC is set to provide Vgg having the maximum gate bias voltage that will achieve the design reliability lifetime according to the measured gate dielectric thickness.
Information query
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