Invention Grant
- Patent Title: Stacked semiconductor package having reduced height
- Patent Title (中): 堆叠的半导体封装具有降低的高度
-
Application No.: US12710486Application Date: 2010-02-23
-
Publication No.: US08354744B2Publication Date: 2013-01-15
- Inventor: Byung-Woo Lee , Young-Lyong Kim , Eun-Chul Ahn
- Applicant: Byung-Woo Lee , Young-Lyong Kim , Eun-Chul Ahn
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG Electronics Co., Ltd.
- Current Assignee: SAMSUNG Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Stanzione & Kim, LLP
- Priority: KR10-2009-0014943 20090223
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A stacked semiconductor package includes an upper unit package and a lower unit package. The lower unit package includes a substrate, a semiconductor chip disposed on an upper surface of the substrate, terminal pads arranged on an upper surface of the semiconductor chip, protrusions formed on the terminal pads, a protective layer formed on the substrate and covering the semiconductor chip and the protrusions, and openings formed in the protective layer and exposing the protrusions. The upper unit package includes a substrate, ball lands provided on a lower surface of the substrate, and solder balls formed on the ball lands. The solder balls of the upper unit package are inserted into the openings of the lower unit package to be connected to the protrusions of the lower unit package.
Public/Granted literature
- US20100213593A1 STACKED SEMICONDUCTOR PACKAGE Public/Granted day:2010-08-26
Information query
IPC分类: