Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by creating a patterning non-uniformity at the bottom of the gate electrode

Invention Grant

US08357573B2 Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by creating a patterning non-uniformity at the bottom of the gate electrode 有权

Title translation: 通过在栅电极的底部产生图案化不均匀性，包括嵌入式应变诱导半导体合金的晶体管中的应变增强

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Patent Title: Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by creating a patterning non-uniformity at the bottom of the gate electrode
Patent Title (中): 通过在栅电极的底部产生图案化不均匀性，包括嵌入式应变诱导半导体合金的晶体管中的应变增强
Application No.: US12772436

Application Date: 2010-05-03
Publication No.: US08357573B2

Publication Date: 2013-01-22
Inventor: Stephan Kronholz , Markus Lenski , Vassilios Papageorgiou
Applicant: Stephan Kronholz , Markus Lenski , Vassilios Papageorgiou
Applicant Address: KY Grand Cayamn
Assignee: GLOBALFOUNDRIES, Inc.
Current Assignee: GLOBALFOUNDRIES, Inc.
Current Assignee Address: KY Grand Cayamn
Agency: Williams, Morgan & Amerson, P.C.
Priority: DE102009023298 20090529
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L21/336

Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by creating a patterning non-uniformity at the bottom of the gate electrode

Abstract:

Performance of P-channel transistors may be enhanced on the basis of an embedded strain-inducing semiconductor alloy by forming a gate electrode structure on the basis of a high-k dielectric material in combination with a metal-containing cap layer in order to obtain an undercut configuration of the gate electrode structure. Consequently, the strain-inducing semiconductor alloy may be formed on the basis of a sidewall spacer of minimum thickness in order to position the strain-inducing semiconductor material closer to a central area of the channel region.

Abstract(Chinese):

基于嵌入式应变诱发半导体合金，可以通过基于高k介电材料与含金属盖层组合形成栅电极结构来增强P沟道晶体管的性能，以获得栅电极结构的底切配置。因此，应变诱导半导体合金可以基于最小厚度的侧壁间隔物形成，以便使应变诱导半导体材料更靠近沟道区的中心区域。

Public/Granted literature

US20100301421A1 STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-INDUCING SEMICONDUCTOR ALLOY BY CREATING A PATTERNING NON-UNIFORMITY AT THE BOTTOM OF THE GATE ELECTRODE Public/Granted day:2010-12-02

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS