Invention Grant
- Patent Title: Buffer circuit and duty cycle correction method using same
- Patent Title (中): 缓冲电路和占空比校正方法使用相同
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Application No.: US13050414Application Date: 2011-03-17
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Publication No.: US08358162B2Publication Date: 2013-01-22
- Inventor: Kyoung Tae Kang
- Applicant: Kyoung Tae Kang
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2010-0023812 20100317
- Main IPC: H03K3/017
- IPC: H03K3/017

Abstract:
A buffer circuit includes an amplifier circuit amplifying a difference between an input signal and a reference signal, providing a branch current that varies with a duty cycle of the input signal, and outputting a preliminary output signal on the basis of the amplified difference. The buffer circuit also includes a charge pump circuit charging/discharging a control node in response to the branch current to provide a control signal. The buffer circuit also includes a driver circuit configured to control pull-up strength and pull-down strength for the preliminary output signal based on control signal to thereby correct the duty cycle of the preliminary output signal in relation to a target duty cycle.
Public/Granted literature
- US20110227622A1 BUFFER CIRCUIT AND DUTY CYCLE CORRECTION METHOD USING SAME Public/Granted day:2011-09-22
Information query
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