Invention Grant
US08358711B2 Circuit arrangement for reducing a crest factor, and method for reducing a signal dynamic range
有权
用于降低波峰因数的电路布置,以及降低信号动态范围的方法
- Patent Title: Circuit arrangement for reducing a crest factor, and method for reducing a signal dynamic range
- Patent Title (中): 用于降低波峰因数的电路布置,以及降低信号动态范围的方法
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Application No.: US11603745Application Date: 2006-11-22
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Publication No.: US08358711B2Publication Date: 2013-01-22
- Inventor: Stefano Marsili
- Applicant: Stefano Marsili
- Applicant Address: DE Neubiberg
- Assignee: Lantiq Deutschland GmbH
- Current Assignee: Lantiq Deutschland GmbH
- Current Assignee Address: DE Neubiberg
- Agency: Eschweiler & Associates, LLC
- Priority: DE102005056954 20051129
- Main IPC: H04L27/28
- IPC: H04L27/28

Abstract:
To reduce the crest factor of a total signal, the signal dynamic range is corrected in baseband upstream of the interpolation filters. To this end, provision is made for the input of a correction device to be coupled to at least two signal sources which are designed to provide digital signals on different frequency bands. The correction device is designed to determine correction factors from the digital signals applied to the input and use them to alter the respective digital signals. The output of the correction device is coupled to a first and at least one second interpolation filter. This allows reduction of the signal dynamic range in baseband, which reduces the crest factor without having to accept substantial losses in signal quality.
Public/Granted literature
- US20070129026A1 Circuit arrangement for reducing a crest factor, and method for reducing a signal dynamic range Public/Granted day:2007-06-07
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