Invention Grant
- Patent Title: Timing wires in a graphical program
- Patent Title (中): 在图形程序中定时导线
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Application No.: US11742528Application Date: 2007-04-30
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Publication No.: US08359567B2Publication Date: 2013-01-22
- Inventor: Jacob Kornerup , Jeffrey L. Kodosky , Hugo A. Andrade , Biren Shah , Aljosa Vrancic , Michael L. Santori
- Applicant: Jacob Kornerup , Jeffrey L. Kodosky , Hugo A. Andrade , Biren Shah , Aljosa Vrancic , Michael L. Santori
- Applicant Address: US TX Austin
- Assignee: National Instruments Corporation
- Current Assignee: National Instruments Corporation
- Current Assignee Address: US TX Austin
- Agency: Meyertons Hood Kivlin Kowert & Goetzel, P.C.
- Agent Jeffrey C. Hood; Jason L. Burgess
- Main IPC: G06F9/44
- IPC: G06F9/44

Abstract:
A system and method for specifying timing relationships among nodes in a graphical program. User input specifying desired timing of a first node with respect to timing of a second node may be received. In various embodiments, any kind of timing relationship or timing constraint between the first node and the second node may be specified. Timing information may be displayed on the display to visually indicate the timing of the first node with respect to timing of the second node. In one embodiment, displaying the timing information may comprise displaying a timing wire between the first node and the second node. The graphical program may be executed in such a way that the visually indicated timing of the first node with respect to timing of the second node is satisfied.
Public/Granted literature
- US20070203683A1 Timing Wires in a Graphical Program Public/Granted day:2007-08-30
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