Invention Grant
- Patent Title: Method and system for assessing reliability of integrated circuit
- Patent Title (中): 评估集成电路可靠性的方法和系统
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Application No.: US12508111Application Date: 2009-07-23
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Publication No.: US08362794B2Publication Date: 2013-01-29
- Inventor: Fen Chen , Kai D Feng , Zhong-Xiang He
- Applicant: Fen Chen , Kai D Feng , Zhong-Xiang He
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Yuanmin Cai
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
The present invention provides a method. The method includes operating a plurality of field-effect-transistors (FETs) under a first operation condition; reversing an operation direction for at least one of the plurality of FETs for a brief period of time; measuring a second operation condition of the one of the plurality of FETs during the brief period of time; computing a difference between the second operation condition and a reference operation condition; and providing a reliability indicator based upon the difference between the second and the reference operation conditions, wherein the plurality of FETs are employed in a single integrated circuit (IC).
Public/Granted literature
- US20110018575A1 METHOD AND SYSTEM FOR ASSESSING RELIABILITY OF INTEGRATED CIRCUIT Public/Granted day:2011-01-27
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