According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array connected to word lines and bit lines, and formed by arranging a plurality of memory cells in a matrix, each memory cell storing one of n values (n is a natural number of not less than 2), and a control circuit configured to write data in the memory cells by controlling potentials of the word lines and the bit lines in accordance with input data. The control circuit performs a write verify operation a plurality of number of times by changing a voltage level, stores data of the voltage level at which verify pass occurs, and determines a write voltage based on the stored data of the voltage level.