Invention Grant
US08363502B2 System and method for correcting programming failures in a programmable fuse array
有权
用于校正可编程保险丝阵列中的编程故障的系统和方法
- Patent Title: System and method for correcting programming failures in a programmable fuse array
- Patent Title (中): 用于校正可编程保险丝阵列中的编程故障的系统和方法
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Application No.: US12950780Application Date: 2010-11-19
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Publication No.: US08363502B2Publication Date: 2013-01-29
- Inventor: Daniel Rey-Losada
- Applicant: Daniel Rey-Losada
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Koppel, Patrick, Heybl & Philpott
- Main IPC: G11C17/18
- IPC: G11C17/18

Abstract:
A system for correcting programming failures in an M-bit primary array of programmable fuses. The address of the failed fuse is stored in a secondary fuse array. Correction logic coupled to the primary and secondary arrays propagates the programming states of the good fuses, and corrects the programming state of the failed fuse, if any. The correction logic preferably comprises a decoder coupled to the secondary array which produces a one-hot M-bit word representing the failed fuse, and combinatorial logic arranged to receive the programming states of the primary array fuses and the one-hot M-bit word at respective inputs and to produce the correction logic output. Multiple failures can be accommodated using multiple secondary arrays, each storing the address of a respective failed fuse, or a tertiary array which stores the address of a failed fuse in either the primary or secondary arrays.
Public/Granted literature
- US20120131400A1 SYSTEM AND METHOD FOR CORRECTING PROGRAMMING FAILURES IN A PROGRAMMABLE FUSE ARRAY Public/Granted day:2012-05-24
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