In one embodiment, a method of generating a circuit design is provided. For each data terminal connecting a plurality of components in a circuit design, a respective list of dimensions of data used by the data terminal are determined. A plurality of exchange orderings are generated that each indicate an order in which dimensions are exchanged between the lists. For each exchange ordering, dimensions are exchanged between the lists according to the exchange ordering to produce a set of supplemented lists of dimensions. A set of buffers for buffering data between the data terminals are determined based on the supplemented lists of dimensions. Memory requirements are determined for each of the set of buffers. The circuit design is modified to include the one of the determined sets of buffers having a lowest memory requirement.