In a design verification apparatus, a priority resolver selects one or more verification datasets for verifying a procedure described in a design specification of a target product, in response to a verification request for that procedure. The priority resolver determines a priority score of each parameter that the selected verification datasets specify as a constraint on the procedure. A verification order resolver determines a verification order of the selected verification datasets, based on the priority scores determined by the priority resolver. An output processor produces data identifying the verification datasets, together with indication of the determined verification order.