Invention Grant
US08365117B2 Solutions for on-chip modeling of open termination of fringe capacitance 有权
用于片状电容开放端接的芯片建模解决方案

Solutions for on-chip modeling of open termination of fringe capacitance
Abstract:
A computer-implemented method of generating a library object for an integrated circuit design is disclosed. In one embodiment, the method includes: analyzing a pair of integrated circuit design objects for fringe capacitance effects between the pair of integrated circuit design objects; and generating the library object accounting for the fringe capacitance effects prior to completion of a layout design for the integrated circuit design.
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