Invention Grant
- Patent Title: Manufacturing stacked semiconductor device
- Patent Title (中): 制造叠层半导体器件
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Application No.: US12210113Application Date: 2008-09-12
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Publication No.: US08367466B2Publication Date: 2013-02-05
- Inventor: Masataka Hoshino , Junichi Kasai
- Applicant: Masataka Hoshino , Junichi Kasai
- Applicant Address: US CA Sunnyvale
- Assignee: Spansion LLC
- Current Assignee: Spansion LLC
- Current Assignee Address: US CA Sunnyvale
- Priority: JP2007-238877 20070914
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A method in accordance with an embodiment of the invention can include forming fan-out wirings on an insulating layer formed on a wafer. Additionally, electrodes of a plurality of semiconductor chips stacked on the fan-out wirings can be electrically coupled with the fan-out wirings. The wafer can be removed.
Public/Granted literature
- US20090230533A1 MANUFACTURING STACKED SEMICONDUCTOR DEVICE Public/Granted day:2009-09-17
Information query
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