Invention Grant
US08367475B2 Chip scale package assembly in reconstitution panel process format
有权
芯片级封装组装在重组面板工艺格式中
- Patent Title: Chip scale package assembly in reconstitution panel process format
- Patent Title (中): 芯片级封装组装在重组面板工艺格式中
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Application No.: US13071799Application Date: 2011-03-25
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Publication No.: US08367475B2Publication Date: 2013-02-05
- Inventor: Edward Law , Rezaur R. Khan , Edmund Law
- Applicant: Edward Law , Rezaur R. Khan , Edmund Law
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Fiala & Weaver P.L.L.C.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
Methods, systems, and apparatuses are described for the assembly of integrated circuit (IC) packages. A substrate panel is formed that includes a plurality of substrates. The substrate panel is singulated to separate the plurality of substrates. At least a subset of the separated substrates is attached to a surface of a carrier. One or more dies are attached to each of the substrates on the carrier. The dies and the substrates are encapsulated on the carrier with a molding compound. The carrier is detached from the encapsulated dies and substrates to form a molded assembly that includes the molding compound encapsulating the dies and substrates. A plurality of interconnects is attached to each of the substrates at a surface of the molded assembly. The molded assembly is singulated to form a plurality of IC packages. Each IC package includes at least one of the dies and a substrate.
Public/Granted literature
- US20120241955A1 CHIP SCALE PACKAGE ASSEMBLY IN RECONSTITUTION PANEL PROCESS FORMAT Public/Granted day:2012-09-27
Information query
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