Invention Grant
US08368149B2 Semidonductor device having stressed metal gate and methods of manufacturing same 有权
具有应力金属栅的半导体器件及其制造方法

Semidonductor device having stressed metal gate and methods of manufacturing same
Abstract:
The present disclosure provides various embodiments of a semiconductor device and method of fabricating the semiconductor device. An exemplary semiconductor device includes a semiconductor substrate and a gate stack disposed over the semiconductor substrate. The gate stack includes a gate dielectric layer disposed over the semiconductor substrate and a tuned, stressed metal gate layer disposed over the gate dielectric layer. The tuned, stressed metal gate layer includes a stress that distributes strain differently to portions of the semiconductor substrate having different surface characteristics. In an example, the gate stack is disposed over a portion of a fin of the semiconductor substrate, and the fin has a varying thickness, providing a fin with a roughened surface. The tuned, stressed metal gate layer includes a stress that distributes strain differently to portions of the fin having different thicknesses.
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