Invention Grant
- Patent Title: Wafer scale package for high power devices
- Patent Title (中): 用于大功率器件的晶圆级封装
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Application No.: US13225987Application Date: 2011-09-06
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Publication No.: US08368210B2Publication Date: 2013-02-05
- Inventor: Henning M. Hauenstein
- Applicant: Henning M. Hauenstein
- Applicant Address: US CA El Segundo
- Assignee: International Rectifier Corporation
- Current Assignee: International Rectifier Corporation
- Current Assignee Address: US CA El Segundo
- Agency: Farjami & Farjami LLP
- Main IPC: H01L23/34
- IPC: H01L23/34

Abstract:
A semiconductor device package is formed of DBC in which thinned MOSgated and/or diode die are soldered to the bottom of an etched depression in the upper conductive layer. A via in the insulation layer of the DBC is filled with a conductive material to form a resistive shunt. Plural packages may be formed in a DBC card and may be separated individually or in clusters. The individual packages are mounted in various arrays on a support DBC board and heat sink. Integrated circuits may be mounted on the assembly and connected to the die for control of the die conduction.
Public/Granted literature
- US20110316086A1 Wafer Scale Package for High Power Devices Public/Granted day:2011-12-29
Information query
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