Invention Grant
US08368424B1 Programmable logic device wakeup using a general purpose input/output port 有权
可编程逻辑器件使用通用输入/输出端口唤醒

Programmable logic device wakeup using a general purpose input/output port
Abstract:
In one embodiment, a programmable logic device such as an FPGA includes a programmable fabric adapted to operate normally and in a sleep mode, and a general purpose input/output port (I/O). The I/O port is adapted to function in conventional fashion during normal operation of the programmable fabric and as a wakeup control port during the sleep mode.
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