A sample and hold circuit includes an operational amplifier; a sampling capacitor configured to sample input voltages at a plurality of different timings; an adding/subtracting unit configured to perform an adding or subtracting operation of the input voltages sampled by the sampling capacitor; and an offset voltage removing unit configured to remove an input offset voltage component of the operational amplifier from a voltage obtained by the adding or subtracting operation. The operational amplifier is configured to produce an output by holding the voltage from which the input offset voltage component of the operational amplifier has been removed by the offset voltage removing unit.