Invention Grant
- Patent Title: Delay locked loop including a mechanism for reducing lock time
- Patent Title (中): 延迟锁定环包括减少锁定时间的机制
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Application No.: US12901745Application Date: 2010-10-11
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Publication No.: US08368444B2Publication Date: 2013-02-05
- Inventor: Pradeep R. Trivedi , Vincent R. von Kaenel
- Applicant: Pradeep R. Trivedi , Vincent R. von Kaenel
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Lawrence J. Merkel; Stephen J. Curran
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A delay locked loop (DLL) includes a delay line configured to provide a delayed version of a reference clock as a feedback clock. The DLL also includes a phase detector that may provide an output signal that is indicative of a change in a delay associated with the delay line. The DLL may also include a step size controller that may provide a step size indication corresponding to a first step size in response to detecting the output signal indicating a first change in delay, and to provide a step size indications corresponding to a second step size that is smaller than the first step size in response to detecting the output signal indicating a second change in delay.
Public/Granted literature
- US20120086484A1 Delay Locked Loop Including a Mechanism for Reducing Lock Time Public/Granted day:2012-04-12
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