Invention Grant
- Patent Title: NMOS-based feedback power-clamp for on-chip ESD protection
- Patent Title (中): 基于NMOS的反馈功率钳位,用于片上ESD保护
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Application No.: US12795657Application Date: 2010-06-08
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Publication No.: US08369054B2Publication Date: 2013-02-05
- Inventor: Xiaowu Cai , Beiping Yan , Xiaoyang Du , Xiao Huo , Xiaoyong Han , Bingyong Yan
- Applicant: Xiaowu Cai , Beiping Yan , Xiaoyang Du , Xiao Huo , Xiaoyong Han , Bingyong Yan
- Applicant Address: HK Hong Kong
- Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Current Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Current Assignee Address: HK Hong Kong
- Agency: gPatent LLC
- Agent Stuart T. Auvinen
- Main IPC: H02H3/22
- IPC: H02H3/22

Abstract:
A power-to-ground clamp transistor provides electrostatic discharge (ESD) protection. A filter capacitor and resistor generate a filter voltage that is buffered by three stages to drive the gate of the clamp transistor. The filter capacitor is about twenty times smaller than in a conventional clamp circuit. Feedback in the circuit keeps the clamp transistor turned on after the R-C time constant of the capacitor and resistor in the filer has elapsed, allowing for a smaller capacitor to turn on the clamp transistor longer. A sub-threshold-conducting transistor in the first stage conducts only a small sub-threshold current, which extends the discharge time of the first stage. The gate of the sub-threshold-conducting transistor is driven by feedback from the second stage. A feed-forward resistor has a high resistance value to slowly raise the voltage of the second stage from the filter voltage, and thus slowly raise the gate of the sub-threshold-conducting transistor.
Public/Granted literature
- US20110299202A1 NMOS-Based Feedback Power-Clamp for On-Chip ESD Protection Public/Granted day:2011-12-08
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