Invention Grant
US08369115B2 Time domain voltage step down capacitor based circuit 有权
时域电压降压电容器电路

Time domain voltage step down capacitor based circuit
Abstract:
A time domain voltage step down capacitor based circuit has an oscillating circuit for generating a clock signal. The circuit also has a capacitor based charge pump circuit for receiving the clock signal and an input voltage signal having an input current and generates an output voltage signal, less than the input voltage signal and an output current greater than the input current. The circuit further comprises a comparator circuit for receiving the output voltage signal, as a first input signal thereto, and a reference voltage signal as a second input signal thereto and compares the first input signal to the second input signal and generates a control signal in response thereto. Finally the control signal is supplied to the oscillating circuit to control the generating of the clock signal.
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