A semiconductor integrated circuit device includes a semiconductor substrate; a plurality of word lines extending parallel to one another on the semiconductor substrate; a plurality of bit lines extending parallel to one another on the semiconductor substrate, arranged to cross with the word lines, and delimiting a plurality of crossing regions where the word lines intersect the bit lines and a plurality of unit memory cell regions with each cell region bounded by an adjacent pair of the word lines and an adjacent pair of the bit lines; and gate electrodes for the respective unit memory cell regions, each gate electrode electrically connected with any one of a pair of word lines which delimit a corresponding unit memory cell, and formed such that at least a portion of the gate electrode is bent toward a bit line direction.