Invention Grant
US08369153B2 Semiconductor memory device including stacked gate having charge accumulation layer and control gate and method of writing data to semiconductor memory device
有权
半导体存储器件包括具有电荷累积层和控制栅极的堆叠栅极以及将数据写入半导体存储器件的方法
- Patent Title: Semiconductor memory device including stacked gate having charge accumulation layer and control gate and method of writing data to semiconductor memory device
- Patent Title (中): 半导体存储器件包括具有电荷累积层和控制栅极的堆叠栅极以及将数据写入半导体存储器件的方法
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Application No.: US13451185Application Date: 2012-04-19
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Publication No.: US08369153B2Publication Date: 2013-02-05
- Inventor: Masaki Fujiu
- Applicant: Masaki Fujiu
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-313832 20071204
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
A semiconductor memory device includes memory cells, word lines, a driver circuit, and a control circuit. The driver circuit repeats a programming operation of selecting any one of the word lines, of applying a first voltage to selected one of the word lines, and of applying a second voltage to unselected one of the word lines, to write data to selected one of the memory cells connected to the selected one of the word lines. The control circuit, while the driver circuit is repeating the programming operation, steps up the first voltage and keeps the second voltage constant until the first voltage reaches a first threshold. The control circuit steps up the second voltage after the first voltage has reached the first threshold.
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