A semiconductor device includes an insulation layer (14) provided on a semiconductor substrate (12), a p-type semiconductor region (16) provided on the insulation layer, an isolation region (18) provided that surrounds the p-type semiconductor region to reach the insulation layer, an n-type source region (20) and an n-type drain region (22) provided on the p-type semiconductor region, a charge storage region (30) provided above the p-type semiconductor region between the n-type source region and the n-type drain region, and an voltage applying portion that applies a different voltage to the p-type semiconductor region while any of programming, erasing and reading a different data of a memory cell that has the charge storage region is being preformed.