Invention Grant
US08369182B2 Delay locked loop implementation in a synchronous dynamic random access memory
失效
在同步动态随机存取存储器中延迟锁定环路的实现
- Patent Title: Delay locked loop implementation in a synchronous dynamic random access memory
- Patent Title (中): 在同步动态随机存取存储器中延迟锁定环路的实现
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Application No.: US12547955Application Date: 2009-08-26
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Publication No.: US08369182B2Publication Date: 2013-02-05
- Inventor: Richard C. Foss , Peter B. Gillingham , Graham Allan
- Applicant: Richard C. Foss , Peter B. Gillingham , Graham Allan
- Applicant Address: CA Ontario
- Assignee: Mosaid Technologies Incorporated
- Current Assignee: Mosaid Technologies Incorporated
- Current Assignee Address: CA Ontario
- Agency: Hamilton, Brook, Smith & Reynolds, P.C.
- Main IPC: G11C8/00
- IPC: G11C8/00
Abstract:
A clock applying circuit for a synchronous memory is comprised of a clock input for receiving a clock input signal, apparatus connected to the synchronous memory for receiving a driving clock signal, and a tapped delay line for receiving the clock input signal for delivering the clock driving signal to the synchronous memory in synchronism with but delayed from the clock input signal, the delay being a small fraction of the clock period of the clock input signal.
Public/Granted literature
- US20090316514A1 Delay Locked Loop Implementation in a Synchronous Dynamic Random Access Memory Public/Granted day:2009-12-24
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