Invention Grant
- Patent Title: Method and apparatus for compiling intellectual property systems design cores using an incremental compile design flow
- Patent Title (中): 使用增量编译设计流程编制知识产权制度设计核心的方法和装置
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Application No.: US12157809Application Date: 2008-06-13
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Publication No.: US08370776B1Publication Date: 2013-02-05
- Inventor: Kevin Chan , Terry Borer
- Applicant: Kevin Chan , Terry Borer
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agent L. Cho
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A method for designing a system on a target device includes compiling an intellectual property (IP) core to be implemented on the target device such that it satisfies user specified requirements for the system. User logic is compiled after the IP core has been compiled to satisfy user specified requirements for the system.
Information query
