Invention Grant
US08372663B2 Good chip classifying method on wafer, and chip quality judging method, marking mechanism, and manufacturing method of semiconductor device using the good chip classifying method
失效
晶片上的芯片分级方法，芯片质量判断方法，标记机制，以及使用优良芯片分类方法的半导体器件的制造方法
- Patent Title: Good chip classifying method on wafer, and chip quality judging method, marking mechanism, and manufacturing method of semiconductor device using the good chip classifying method
- Patent Title (中): 晶片上的芯片分级方法，芯片质量判断方法，标记机制，以及使用优良芯片分类方法的半导体器件的制造方法
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Application No.: US12145367Application Date: 2008-06-24
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Publication No.: US08372663B2Publication Date: 2013-02-12
- Inventor: Hirokazu Yanai
- Applicant: Hirokazu Yanai
- Applicant Address: JP Tokyo
- Assignee: Ricoh Company, Ltd.
- Current Assignee: Ricoh Company, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Dickstein Shapiro LLP
- Priority: JP2007-172725 20070629
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
In a disclosed good chip classifying method capable of classifying the good chips on a wafer, defective chips are divided into defective groups so that the defective chips contiguous to each other are placed into the same defective group based on the wafer test results; the defective group is judged as a defective chip concentrated distribution area when the number of the defective chips exceeds the prescribed value; a defective chip concentrated distribution nearby area including all the defective chips in the defective chip concentrated distribution area and nearby good chips is formed; and the good chips in the defective chip concentrated distribution nearby area are classified to have a chip index based on four directions (X and Y axis directions) on which the defective chips in the defective chip concentrated distribution area are disposed.
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