Invention Grant
- Patent Title: Vertical transistors
- Patent Title (中): 垂直晶体管
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Application No.: US13329977Application Date: 2011-12-19
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Publication No.: US08372710B2Publication Date: 2013-02-12
- Inventor: Werner Juengling
- Applicant: Werner Juengling
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Knobbe Martens Olson & Bear LLP
- Main IPC: H01L21/8242
- IPC: H01L21/8242 ; H01L21/336 ; H01L21/20

Abstract:
A semiconductor structure having U-shaped transistors includes source/drain regions at the tops of pairs of pillars defined by crossing trenches in the substrate. One pillar is connected to the other pillar in the pair by a ridge that extends above the surrounding trenches. The ridge and lower portions of the pillars define U-shaped channels on opposite sides of the U-shaped structure, facing a gate structure in the trenches on those opposite sides, forming a two sided surround transistor. Optionally, the space between the pillars of a pair is also filled with gate electrode material to define a three-sided surround gate transistor. One of the source/drain regions of each pair extending to a digit line and the other extending to a memory storage device, such as a capacitor. Methods of forming semiconductor structures are also disclosed.
Public/Granted literature
- US20120094449A1 VERTICAL TRANSISTORS Public/Granted day:2012-04-19
Information query
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