Invention Grant
- Patent Title: Method for forming semiconductor device
- Patent Title (中): 半导体器件形成方法
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Application No.: US12833940Application Date: 2010-07-09
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Publication No.: US08372748B2Publication Date: 2013-02-12
- Inventor: Dae Jin Park , Jong Won Jang
- Applicant: Dae Jin Park , Jong Won Jang
- Applicant Address: KR Icheon
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon
- Priority: KR10-2010-0020385 20100308
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method for manufacturing semiconductor device includes forming an interlayer dielectric layer including a contact plug defined therein to electrically couple a semiconductor substrate on which a cell region and a dummy region are defined. A sacrificial layer is formed over the interlayer dielectric layer. An etch stop pattern is formed over the sacrificial layer, the etch stop pattern being vertically aligned to the dummy region. A storage electrode region through the sacrificial layer is defined to expose a first storage electrode contact of the cell region, the second storage electrode contact of the dummy region remaining covered by the sacrificial layer. A conductive layer is deposited within the storage electrode region to form a storage electrode contacting the first storage electrode contact of the cell region.
Public/Granted literature
- US20110217842A1 METHOD FOR FORMING SEMICONDUCTOR DEVICE Public/Granted day:2011-09-08
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