Invention Grant
- Patent Title: Multilayer hard mask
- Patent Title (中): 多层硬掩模
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Application No.: US12686866Application Date: 2010-01-13
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Publication No.: US08372755B2Publication Date: 2013-02-12
- Inventor: Shiang-Bau Wang , Hun-Jan Tao
- Applicant: Shiang-Bau Wang , Hun-Jan Tao
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone LLP
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L29/66

Abstract:
A method for fabricating a semiconductor device is disclosed. In an embodiment, the method may include providing a semiconductor substrate; forming gate material layers over the semiconductor substrate; forming a multi-layer hard mask layer over the gate material layers, wherein the multi-layer hard mask layer includes a plurality of film stacks, each film stack having a silicon oxide layer and a carbon-containing material layer, each film stack having a thickness equal to or less than about 10 angstrom; patterning the multi-layer hard mask layer, forming an opening of the multi-hard mask layer; etching the gate material layers within the opening of the multi-layer hard mask layer, forming a gate structure; performing a tilt-angle ion implantation process to the semiconductor substrate, wherein a first remaining thickness of the multi-layer hard mask layer is less than a first thickness; and thereafter performing an epitaxy growth to the semiconductor substrate, wherein a second remaining thickness of the multi-layer hard mask layer is greater than a second thickness.
Public/Granted literature
- US20110171804A1 Multilayer Hard Mask Public/Granted day:2011-07-14
Information query
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