Invention Grant
- Patent Title: Circuit device
- Patent Title (中): 电路设备
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Application No.: US12568491Application Date: 2009-09-28
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Publication No.: US08373197B2Publication Date: 2013-02-12
- Inventor: Kiyoaki Kudo , Takashi Shibasaki , Tetsuya Yamamoto
- Applicant: Kiyoaki Kudo , Takashi Shibasaki , Tetsuya Yamamoto
- Applicant Address: JP Gunma US AZ Phoenix
- Assignee: SANYO Semiconductor Co., Ltd.,Semiconductor Components Industries, LLC
- Current Assignee: SANYO Semiconductor Co., Ltd.,Semiconductor Components Industries, LLC
- Current Assignee Address: JP Gunma US AZ Phoenix
- Agency: Morrison & Foerster LLP
- Priority: JP2008-250914 20080929
- Main IPC: H01L29/74
- IPC: H01L29/74 ; H01L23/495 ; H01L23/10 ; H01L23/34 ; H01L29/66

Abstract:
Provided is a circuit device having a configuration in which thermal interference between built-in elements is suppressed and being miniaturized in total size. A hybrid integrated circuit device of the present invention includes: a circuit substrate, a sealing resin and leads. The circuit substrate in its upper surface is incorporated with a hybrid integrated circuit formed of semiconductor elements and the like respectively fixed to heat spreaders. The sealing resin coats the circuit substrate and thus seals the hybrid integrated circuit. The leads each extend to the outside while being fixed to a pad formed of a conductive pattern. In this hybrid integrated circuit device, the semiconductor elements are mounted on the respective heat spreaders at positions offset from each other, and thereby are arranged to be spaced away from each other.
Public/Granted literature
- US20100078675A1 CIRCUIT DEVICE Public/Granted day:2010-04-01
Information query
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