Invention Grant
- Patent Title: Semiconductor device including a Trench-Gate Fin-FET
- Patent Title (中): 包括沟槽栅极Fin-FET的半导体器件
-
Application No.: US12869214Application Date: 2010-08-26
-
Publication No.: US08373226B2Publication Date: 2013-02-12
- Inventor: Hiroaki Taketani
- Applicant: Hiroaki Taketani
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2009-199954 20090831
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
In Trench-Gate Fin-FET, in order that the advantage which is exerted in Fin-FET can be sufficiently taken even if a transistor becomes finer and, at the same time, decreasing of on-current can be suppressed by saving a sufficiently large contact area in the active region, a fin width 162 of a channel region becomes smaller than a width 161 of an active region.
Public/Granted literature
- US20110049599A1 SEMICONDUCTOR DEVICE Public/Granted day:2011-03-03
Information query
IPC分类: