A chip package includes a circuit board, a pad, a chip, and an adhesive layer. The circuit board includes a substrate and a circuit layer formed on the substrate. The pad includes an electrical connection area in a center portion thereof and an extending area extending outward from the electrical connection area. The electrical connection area covers the circuit layer. The extending area surrounds the electrical connection area and the circuit layer. The chip includes two chip areas and an enlarging area. The two chip areas are separated from each other and electrically connected to the electrical connection area. The enlarging area surrounds the two chip areas. The adhesive layer attaches the chip to the pad. The chip and the pad are positioned on opposite sides of the adhesive layer.