Invention Grant
US08373288B2 Alignment mark, method of manufacturing semiconductor device, and mask set
有权
对准标记,制造半导体器件的方法和掩模组
- Patent Title: Alignment mark, method of manufacturing semiconductor device, and mask set
- Patent Title (中): 对准标记,制造半导体器件的方法和掩模组
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Application No.: US12726697Application Date: 2010-03-18
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Publication No.: US08373288B2Publication Date: 2013-02-12
- Inventor: Hiroomi Nakajima
- Applicant: Hiroomi Nakajima
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-070743 20090323
- Main IPC: H01L23/544
- IPC: H01L23/544

Abstract:
An alignment mark formed by using a first mask used in forming a same memory cell pattern on a substrate and formed together with the memory cell pattern includes: a first pattern for position detection used for alignment in forming a first wiring pattern; and a first irregular reflection prevention mark that suppresses, when a position detection signal is irradiated as alignment in forming a second wiring pattern further on an upper layer side than the first wiring pattern, irregular reflection of a position detection signal from a second pattern for position detection formed further in a lower layer than the first pattern for position detection.
Public/Granted literature
- US20100240192A1 ALIGNMENT MARK, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND MASK SET Public/Granted day:2010-09-23
Information query
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