An SDRAM includes a DC-DC converter IC for generating a first internal power supply voltage from external power supply voltage, a regulator IC for generating a second internal power supply voltage lower than the first internal power supply voltage, from external power supply voltage, and a switching portion for supplying the first internal power supply voltage to an internal circuit in a normal operation mode and supplying the second internal power supply voltage to the internal circuit in a self-refresh mode. The switching unit allows the DC-DC converter IC and the regulator IC to operate simultaneously only for a prescribed overlapped period, at a time of operation mode switching. The DC-DC converter IC temporarily increases the first internal power supply voltage within the operating voltage range of the internal circuit in the overlapped period.