Invention Grant
- Patent Title: Distribution of electrostatic discharge (ESD) circuitry within an integrated circuit
- Patent Title (中): 集成电路中静电放电(ESD)电路的分布
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Application No.: US12345507Application Date: 2008-12-29
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Publication No.: US08373953B2Publication Date: 2013-02-12
- Inventor: Michael A Stockinger , Anthony G Dunne , Alex P Gerdemann , James W Miller , Daniel J O'Hare , Paul J Sheridan , Jeannie Han Millaway
- Applicant: Michael A Stockinger , Anthony G Dunne , Alex P Gerdemann , James W Miller , Daniel J O'Hare , Paul J Sheridan , Jeannie Han Millaway
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H02H9/00
- IPC: H02H9/00

Abstract:
Embodiments of the present disclosure provide an integrated circuit (IC) or semiconductor device. This semiconductor device includes a number of I/O pads or bumps on an outer surface of the semiconductor device, a number of electrostatic discharge (ESD) protection cells and functional modules. Individual ESD protection cells couple to and are downstream of individual I/O pads. Functional modules coupled to and are downstream of individual ESD protection cells. The ESD protection cells protect circuitry within the functional module from electrostatic discharge events. A rail clamp may provide an ESD discharge path between a first power supply bus and a second power supply bus. The ESD protection cells may be collected in groups to form clusters (with linear or irregular placement patterns). These clusters may be distributed autarchically across the semiconductor device overlapping one or more functional modules or within spaces or gaps between the functional modules.
Public/Granted literature
- US20100165522A1 DISTRIBUTION OF ELECTROSTATIC DISCHARGE (ESD) CIRCUITRY WITHIN AN INTEGRATED CIRCUIT Public/Granted day:2010-07-01
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