Invention Grant
- Patent Title: Dual-level package
- Patent Title (中): 双层包
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Application No.: US12499067Application Date: 2009-07-07
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Publication No.: US08373996B2Publication Date: 2013-02-12
- Inventor: Donald J. Pavinski, Jr. , August Spannagel , Charles H. Joyner , Peter W. Evans , Matthew Fisher , Mark J. Missey
- Applicant: Donald J. Pavinski, Jr. , August Spannagel , Charles H. Joyner , Peter W. Evans , Matthew Fisher , Mark J. Missey
- Applicant Address: US CA Sunnyvale
- Assignee: Infinera Corporation
- Current Assignee: Infinera Corporation
- Current Assignee Address: US CA Sunnyvale
- Agent David L. Soltz
- Main IPC: H05K7/00
- IPC: H05K7/00

Abstract:
Consistent with an aspect of the present disclosure, a package is provided that has a carrier and first and second substrates provided on the carrier. Conductive traces are provided on the first substrate (upper traces) and below it (lower traces) to provide two levels of electrical connectivity to a photonic integrated circuit (PIC) provided on the second substrate. As a result, an increased number of connections can be made to the PIC in a relatively small package, while maintaining adequate spacing and line widths for each trace. In addition, the lower traces are connected to bonding pads on the surface of the first substrate and are thus provided in the same plane as the upper traces. Testing of and access to both upper and lower traces is thus simplified.
Public/Granted literature
- US20110007486A1 DUAL-LEVEL PACKAGE Public/Granted day:2011-01-13
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