Invention Grant
- Patent Title: Semiconductor device and method of manufacturing semiconductor device
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12654205Application Date: 2009-12-14
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Publication No.: US08378341B2Publication Date: 2013-02-19
- Inventor: Yoshihiro Hayashi , Naoya Inoue , Kishou Kaneko
- Applicant: Yoshihiro Hayashi , Naoya Inoue , Kishou Kaneko
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-318098 20081215
- Main IPC: H01L29/18
- IPC: H01L29/18 ; H01L21/00

Abstract:
A semiconductor device of the present invention has a first interconnect layer formed over the semiconductor substrate, and a semiconductor element; the first interconnect layer has an insulating layer, and a first interconnect filled in a surficial portion of the insulating layer; the semiconductor element has a semiconductor layer, a gate insulating film, and a gate electrode; the semiconductor layer is positioned over the first interconnect layer; the gate insulating film is positioned over or below semiconductor layer; and the gate electrode is positioned on the opposite side of the semiconductor layer while placing the gate insulating film in between.
Public/Granted literature
- US20100148171A1 Semiconductor device and method of manufacturing semiconductor device Public/Granted day:2010-06-17
Information query
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