A voltage regulator includes an upper switching transistor connected between an input voltage node and a phase node. A lower switching transistor is connected between the phase node and ground. An output filter is connected between the phase node and an output voltage node. A PWM control circuit generates an PWM control signal responsive to a feedback voltage. An upper gate control circuit controls operation of the upper switching transistor responsive to the PWM control signal. A lower gate control circuit controls operation of the lower switching transistor responsive to the PWM control signal and a ramp voltage signal. The lower gate control circuit linearly increases a lower gate control signal from 0 to (1-D), where D=the duty cycle, to transition the voltage regulator for diode emulation mode of operation to synchronous mode of operation responsive to a first pulse in the PWM control signal.