Invention Grant
US08378717B1 High-speed BiCMOS double sampling track-and-hold amplifier circuit 失效
高速BiCMOS双采样跟踪保持放大器电路

High-speed BiCMOS double sampling track-and-hold amplifier circuit
Abstract:
A high-speed BiCMOS double sampling track-and-hold amplifier circuit, comprising an input buffer, two front-end switches, two sampling capacitors, two intermediate buffers, two feedback buffers, two back-end switches and an output buffer. The present invention forms a hold circuit featuring BiCMOS double sampling through the aforementioned components so as to reduce complexities in designing the sampling circuit and the output buffer within the BiCMOS track-and-hold amplifier circuit by means of double sampling, thereby increasing the effective sampling rate to two times. Additionally, the high-speed BiCMOS double sampling track-and-hold amplifier circuit according to the present invention further employs the linearization technology to enhance the linearity of the input buffer in the BiCMOS double sampling track-and-hold amplifier circuit in order to improve the dynamic response of the integral BiCMOS double sampling track-and-hold amplifier circuit.
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