Invention Grant
US08379476B2 Semiconductor memory device for reducing ripple noise of back-bias voltage and method of driving semiconductor memory device
有权
用于减小背偏电压的纹波噪声的半导体存储器件以及驱动半导体存储器件的方法
- Patent Title: Semiconductor memory device for reducing ripple noise of back-bias voltage and method of driving semiconductor memory device
- Patent Title (中): 用于减小背偏电压的纹波噪声的半导体存储器件以及驱动半导体存储器件的方法
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Application No.: US12984342Application Date: 2011-01-04
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Publication No.: US08379476B2Publication Date: 2013-02-19
- Inventor: Beom-seop Lee , Young-hyun Jun , Sang-joon Hwang
- Applicant: Beom-seop Lee , Young-hyun Jun , Sang-joon Hwang
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Onello & Mello, LLP
- Priority: KR10-2010-0004482 20100118
- Main IPC: G11C8/00
- IPC: G11C8/00 ; G11C5/14 ; G11C7/00

Abstract:
A semiconductor memory device for reducing ripple noise of a back-bias voltage, and a method of driving the semiconductor memory device include a word line driving circuit and a delay logic circuit. The word line driving circuit enables a sub-word line connected to a selected memory cell to a first voltage, and disables the sub-word line of a non-selected memory cell to a second voltage and a third voltage, in response to a sub-word line enable signal, a first word line driving signal, and a second word line driving signal. The delay logic circuit controls the semiconductor memory device so that an amount of charge of the sub-word line that is introduced to the third voltage is greater than an amount of charge of the sub-word line that is introduced to the second voltage by changing a transition point of time of the sub-word line enable signal with respect to a transition point of time of the first word line driving signal, during the disabling of the sub-word line.
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