Invention Grant
- Patent Title: Systems and methods utilizing redundancy in semiconductor chip interconnects
- Patent Title (中): 利用半导体芯片互连中冗余的系统和方法
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Application No.: US12480754Application Date: 2009-06-09
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Publication No.: US08384417B2Publication Date: 2013-02-26
- Inventor: Michael Laisne , Karim Arabi , Tsvetomir Petrov
- Applicant: Michael Laisne , Karim Arabi , Tsvetomir Petrov
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michelle Gallardo; Nicholas J. Pauley; Jonathan T. Velasco
- Main IPC: H03K19/003
- IPC: H03K19/003
Abstract:
An integrated circuit, or combination of integrated circuits, has a primary interconnect, a redundant interconnect, and circuitry connecting the primary and redundant interconnects allowing selection of the redundant interconnect to bypass the primary interconnect.
Public/Granted literature
- US20100060310A1 Systems and Methods Utilizing Redundancy in Semiconductor Chip Interconnects Public/Granted day:2010-03-11
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